We’ve heard about HBM4 memory several times over the past few months, and this week Samsung revealed that it expects HBM4 to be introduced by 2025. The new memory will feature a 2048-bit interface per stack, twice as wide as HBM3’s 1024-bit.
“Looking ahead, HBM4 is expected to be introduced by 2025 with technologies optimized for high thermal properties in development, such as non-conductive film (NCF) assembly and hybrid copper bonding (HCB),” SangJoon Hwang, EVP and Head of DRAM Product and Technology Team at Samsung Electronics, wrote in a company blog post.
Although Samsung expects HBM4 to be introduced by 2025, its production will probably start in 2025–2026, as the industry will need to do quite a lot of preparing for the technology. In the meantime, Samsung will offer its customers its HBM3E memory stacks with a 9.8 GT/s data transfer rate that will offer bandwidth of 1.25 TB/s per stack.
Earlier this year Micron revealed that ‘HBMNext’ memory was going to emerge around 2026, providing per-stack capacities between 32GB and 64GB and peak bandwidth of 2 TB/s per stack or higher — a marked increase from HBM3E’s 1.2 TB/s per stack. To build a 64GB stack, one will need a 16-Hi stack with 32GB memory devices. Although 16-Hi stacks are supported even by the HBM3 specification, nobody has announced such products so far and it looks like such dense stacks will only hit the market with HBM4.
To produce HBM4 memory stacks, including 16-Hi stacks, Samsung will need to polish off a couple of new technologies mentioned by SangJoon Hwang. One of these technologies is called NCF (non-conductive film) and is a polymer layer that protects TSVs at their solder points from insulation and mechanical shock. Another is HCB (hybrid copper bonding), which is a bonding technology that uses copper conductor and oxide film insulator instead of conventional solder to minimize distance between DRAM devices as well as enable smaller bumps required for a 2048-bit interface.