With advanced packaging rapidly becoming a new front in the global conflict over chips, some argue it’s long overdue.
The administration has until now focused on subsidies to bring back chipmaking to the US, but “we can’t ignore packaging because you can’t do one without the other,” said Representative Jay Obernolte, a California Republican who is one of two vice-chairs of the Congressional Artificial Intelligence Caucus. “It wouldn’t matter if we did 100% of our chip manufacturing onshore if the packaging is still offshore,” he added.
Assembly, testing and packaging – usually considered together as “back-end” manufacturing – was always the least glamorous end of the semiconductor industry, with less innovation and lower added value than the “front end” business of making chips with features measured in the billionths of a meter. Yet the level of sophistication is rising fast as new technologies enable chips to be combined, stacked and their performance enhanced in what industry executives are calling an inflection point.
Advanced packaging can’t help China compete with leading-edge semiconductor developments from the U.S., but it allows Beijing to build faster, cheaper systems for computing by stitching together different chips closely together. In that case China could save its latest chip technology, which is expensive and likely available in limited volume, for the most important part of the chip and use older, cheaper technologies to make chips that carry out other functions like battery management and sensor controls, combining the whole in a powerful package.
It’s a “pivotal solution,” said Bloomberg Intelligence technology analyst Charles Shum. “It doesn’t merely enhance chip-processing speed but crucially enables seamless integration of varied chip types.” As a result, he said, it’s “set to reshape the semiconductor-manufacturing landscape.”Beijing has long made a strategic priority of semiconductor packaging technologies, including in President Xi Jinping’s Made in China program announced in 2015. China has 38% of the world’s assembly, testing and packaging market, the most of any nation, according to the US-based Semiconductor Industry Association. While it lags behind Taiwan and the US in advanced technology, analysts agree that unlike in wafer processing, it’s in a much better position to be able to catch up.
iStockBeijing has long made a strategic priority of semiconductor packaging technologies.
China already boasts the most back-end facilities by number, including the world’s third-largest assembly and testing company, JCET Group, which trails only Taiwan’s ASE Group and Amkor Technology of the US in revenue. What’s more, Chinese companies are building market share, including through JCET’s acquisition of an advanced facility in Singapore and construction of an advanced packaging plant in its hometown of Jiangyin.
“For China, one way around technology transfer restrictions is advanced packaging, because so far it’s a safe space that everyone invests in,” said Mathieu Duchatel of the Institut Montaigne think tank, a Taiwan-based China expert who studies the geopolitics of technology.
It’s a realization now touching Washington as it seeks to deny Beijing access to the kind of advanced computing technologies that could be put to military use – with questionable success.
When Huawei Technologies Inc. quietly released its Mate 60 Pro smartphone in September, China hawks in Washington raised questions as to why US export controls had failed to prevent a development supposedly beyond Beijing’s capabilities.
In testimony to the House Sept. 19, Commerce Secretary Gina Raimondo defended the Biden administration’s focus on denying China access to leading-edge chips and the equipment to make them. But she was primed on advanced packaging. The US needs to ramp up its own advanced packaging capacities, she said, since “chips can only get so small, which means all the special sauce is in the packaging.”
One reason for the sudden focus on that special sauce is its necessity to the kind of high-power semiconductors needed for artificial intelligence applications. Indeed, a shortage of a particular type of packaging known as Chip on Wafer on Substrate, or CoWoS, is a key bottleneck in the production of Nvidia Corp’s AI chips.
Taiwan Semiconductor Manufacturing Co., the main chipmaker for Nvidia, this summer committed $3 billion to a packaging plant to help alleviate the blockage. CEO C.C. Wei told investors on the company’s third-quarter earnings call that the company planned to double CoWoS capacity by the end of next year.
While TSMC has been working on the technology for 12 years, it was a niche application that only took off this year, Jun He, Vice President of Advanced Packaging Technology, told a conference in Taipei in October. “We’re building capacity like crazy,” said Jun He, adding that “everybody, probably even in Starbucks,” is talking about CoWoS.
It’s not just TSMC. Micron Inc. is setting up a $2.75 billion back-end facility in India, while Intel agreed to build a $4.6 billion assembly and test plant in Poland and is putting some $7 billion into advanced packaging in Malaysia. South Korea’s SK Hynix said last year that it plans to invest $15 billion in a packaging facility in the US.
Intel has “some very unique technology now in the packaging area,” Chief Executive Officer Pat Gelsinger said in an interview. “Everybody who’s doing AI chip work today is looking to say, wow, this is the way that I can advance my AI chip capabilities.”
That has some analysts predicting a bonanza for companies in the sphere. According to McKinsey, high-performance chips for data centers, AI accelerators, and consumer electronics will create the greatest demand for advanced packaging technologies.
The number of chips shipped that use advanced packaging is forecast to increase tenfold in the next 18 months – but that could soar to 100 times if it becomes standard in smartphones, Jeffries analysts Mark Lipacis and Vedvati Shrotre wrote in a Sept. 14 report that classed the technology as part of a “tectonic shift” in the industry.
The reason, alluded to by Raimondo, is that chipmaking is running up against the limits of physics.
Chips have been getting better over the last fifty years in large part through advances in production technology. The components now contain up to tens of billions of the tiny transistors that give them the ability to store or process information. But now that path of advancement, called Moore’s Law after Intel’s founder, is coming up against fundamental barriers that are making improvements more difficult and vastly expensive to achieve.
Moore’s Law – more of an observation – states that the number of transistors on a chip doubles about every two years. As that pace of progress slows, and companies “are not able to deliver twice the transistors, at half the cost, at twice the clock speed, and at lower power levels every two years, the industry has begun to rely more on advanced packaging techniques to pick up the slack,” Lipacis and Shrotre wrote.
Instead of cramming ever more tiny components on to one piece of silicon, many designers and companies are touting the benefits of a modular approach, of building products out of several “chiplets” tightly packed together in the same package.
That explains why Dutch specialist BE Semiconductor Industries NV, which makes the tools used for chip packages, has doubled its value to some $9.8 billion in the past 12 months, outpacing the Philadelphia Semiconductor Index two-fold despite a slump in the chip industry in the second half of this year.
That’s still dwarfed by the kind of sums involved in front-end manufacturing – fellow Dutch firm ASML NV, which has a near monopoly on the machines needed to produce leading-edge semiconductors, has a market cap approaching $250 billion. Intel’s cutting-edge chip fabrication plant in the eastern German city of Magdeburg has a price tag of $30 billion, or more than four times its Malaysia commitment.
Yet between Magdeburg, a new site in Ireland, and its Polish plant with capacity for advanced packaging, “Poland could actually be the most important,” Gelsinger said.
Chinese companies are piling into the space, too. They include Semiconductor Manufacturing International Corp. – China’s largest chipmaker, which made the 7 nanometer chip powering the Mate 60 Pro – along with IP leader VeriSilicon and Huawei, according to Berlin-based researchers Jan-Peter Kleinhans and John Lee.
These companies “see potential in utilizing advanced packaging processes to achieve performance gains without relying on foreign cutting-edge front-end processes,” Kleinhans and Lee, of the Stiftung Neue Verantwortung think tank and East West Futures consultancy respectively, wrote in a December report.
The US Commerce Department justifies its decision to focus on front-end manufacturing on the grounds that sanctioning assembly, test and packaging (APT) services would disrupt supply chains without reducing national security risks. China’s APT services “now play a critical and indispensable role in the global supply chain,” and “cannot easily be substituted,” Commerce’s National Institute of Standards and Technology said in September.
The irony is that luring the likes of TSMC and Samsung Electronics Co. to construct cutting-edge chip plants in Arizona and Texas doesn’t ensure self-reliance, since the current lack of capacity means the advanced wafers those plants produce will need to be shipped to Asia to be packaged – most likely in Taiwan.
For Jack Hergenrother, vice president of IBM Global Enterprise Systems Development, advanced packaging is relatively “overlooked” in funding terms. He wants double the allocation to help spur a rise in US packaging capacity to 10-15% of the global total, and ideally to take 25% in a decade, to ensure a secure supply chain. “Having a hub in North America for advanced packaging is super important,” he said.
